
 Introduction to SHARC Multiprocessor Systems Using VisualDSP++

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The following information refers to the Multiprocessor example 
project attached to the EE-Note "Introduction to SHARC Multiprocessor 
Systems Using VisualDSP++". This file provides a brief 
description of the program code and hardware platform used in the
associated EE-Note.  

Contents:

1. File Listing
2. File Description
3. EZ-KIT 21160 Cluster Configuration
4. Downloading files to hardware platform

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1. File Listing
 
MP_21160.dpj	- Project file.
MP.ldf		- Multiprocessor Linker Description File.
ID1.asm		- Processor 1 source code.
ID2.asm		- Processor 2 source code.
Shared.asm     	- Shared memory data declaration file.


2. File Description

MP.ldf
	
The LDF describes the multiprocessor memory offsets, shared 
memory, and each processor's memory (ID1 and ID2). Note that 
more processors can be added to the system following the same
outline as for processors 1 and 2. However, the ADSP-21160 
EZ-KIT Lite only supports a cluster configuration of 2 
ADSP-21160 EZ-KIT Lites.

ID1.asm

Processor's 1 source code. It initializes DSP1 in the cluster.
It declares data arrays and performs several inter-processor 
data transfers with DSP2 and the external shared memory:

	1. Master Interprocessor DMA -> transfer from ID1
	to ID2
	2. Master DMA -> transfer from SBSRAM to ID1
	3. Broadcast write -> broadcast transfer from ID1
	to both ID1 and ID2
	4. Serves VIRPT generated by ID2
	5. Message Passing between DSPs (MSRGx)
	6. Bus locking -> preventing external decives from
	accessing data
	7. Also, an ID check routine has been added to ensure
	correct	functionality.

ID1.dxe is generated when building the project.

ID2.asm

Processor's 2 source code. It initializes DSP2 in the cluster.
It declares data arrays and performs several inter-processor 
data transfers with DSP1 and the external shared memory:

	1. Slave Interprocessor DMA -> transfer from ID1 
	to ID2
	2. DAG transfer -> data transfer from ID2 to ID1
	3. Generates VIRPT Interrupt in ID1
	4. Also, an ID check routine has been added to ensure 
	correct functionality.

ID2.dxe is generated when building the project.

Shared.asm
	
It defines a data array to be placed in the external shared
memory. This file will be used by the linker to generate the
shared.sm file, which initializes the external memory. Note
that the memory will be initialized by the DSP that owns the 
bus after power-up/reset of the system. In this case, 
performed by the DSP with ID1 since has the highest external
bus arbitration priority (lowest system ID) in the system 
after system power-up/reset.

	
NOTE: Three warnings will be generated when building the 
project. All these warnings indicate is that three output 
files, rather than the default one ("Project name".DXE), have
been generated as specified in the Linker Description file 
(LDF) OUTPUT command line of each processor and shared memory.
Example: [Warning li4011]  Ignoring the command line output 
file name '.\DEBUG\MP_21160.DXE' ,creating the output file 
'ID1.DXE'
 	

3. EZ-KIT 21160 Cluster Configuration

The hardware used to test code and processor functionality 
is two ADSP-21160 EZ-KIT Lite evaluation boards configured in
a cluster system. To ensure proper system functionality, the
following set up must be configured:


			 Lower board	  UpperBoard 
-------------------------------------------------------------
SW10 (JTAG/IO)		 On-On-Off-On	  Off-Off-On-On
SW7 (PLD Switches)	 Off-Off-On-Off  Off-On-Off-Off
SW2(BR/SBSRAM)		 Off-Off-Off-On  Off-Off-On-Off
SW12			 Off-Off-Off-Off On-On-On-On
SW13			 Off-Off-Off-Off On-On-On-On
SW11			 Off-On-On-Off	  Off-On-On-On
SW9(CLK CONFIG)		 On-Off-On-On	  On-Off-On-On
SW1(BOARD CLK)		 Off-Off-Off-Off On-On-Off-Off

For the MP system emulation, the Summit-ICE (In Circuit 
Emulator) was used. Please refer to EE-Note for more details
on setting up the JTAG interface and emulator session using 
VisualDSP++ Tools). 	

NOTE: Multiprocessing Debug is only available using the 
ICE-Emulator. The monitor and parallel port interface on the
ADSP-21160 EZ-KIT Lite do not support this feature. As an 
alternative, the EZ-Flash utility can be used to program the
Flash ROM with the multiprocessing code via the parallel port
(Please refer to ADSP-21160 EZ-KIT Lite User's Guide for more
 details).


4. Downloading files to the hardware platform

After having configured the Multiprocessor platform  and JTAG
interface correctly, the following steps should be followed 
for downloading the executable files to the board:

	1. In the Load Configuration window, browse and select
	the two	executable files previously generated (ID1.dxe 
	and ID2.dxe).
 
	2. Make sure each .DXE is loaded into the corresponding 
	DSP (i.e. ID1.dxe into DSP with ID1, and ID2.dxe into 
	DSP with ID2.dxe). This can be done by either checking 
	the ID bits in the SYSTAT register from the register 
	windows, or by	running the ID Checking	routine in both 
	processors. If program enters endless loop 
	(incorrect_ID), it means that code has been loaded into
	the wrong DSPs. Reset DSPs and reload code again.

	3. At this stage, both DSPs are ready for testing and 
	debugging (please refer to the EE-Note for more details
	on debugging Multiprocessor sessions.





